The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent the work is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.
Conventional flash memory stores data by storing electric charges. Each flash cell in the flash memory can store an electric charge. The amount of electric charge stored sets a voltage threshold. Each voltage threshold corresponds to a data value. Thus, a flash cell stores data by storing an electric charge.
Conventional flash memory is often configured to have either single-level cells or multi-level cells. Single-level-cell (SLC) flash memory uses a single reference voltage in the middle of a possible range of voltage thresholds to read stored data. Conventional flash memory logic determines data values by applying a reference voltage to cells of the single-level-cell flash memory. If the applied reference voltage is greater than the voltage threshold, then the cell conducts. If the applied reference voltage is lower than the voltage threshold, then the cell does not conduct. Based on whether the cell conducts or does not conduct, the flash memory logic determines that the single-level-cell stores a 0 or a 1. In other words, the reference voltage divides the possible range of voltage thresholds into two data regions, a data region for 0 and another for 1. Applying the reference voltage produces a resulting bit, which indicates the corresponding data region the voltage threshold is set in. This in turn determines whether data of a 0 or 1 is stored in the single-level-cell.
In multi-level-cell (MLC) flash memory, multiple reference voltages are used to divide the possible range of voltage thresholds into more than two data regions. Conventional two-bits/cell or four-level flash memory, for example, uses three reference voltages to divide the possible range of voltage thresholds into four data regions. This permits storage of two bits of information (e.g., possible binary values of 00, 01, 10, and 11). Conventional three-bits/cell or eight-level flash memory uses seven reference voltages to divide the possible range of voltage thresholds into eight data regions, which permits storage of three bits of information (e.g., possible binary values of 000, 001, 010, 011, 100, 101, 110, and 111).
Conventional flash memory logic reads data from a multi-level cell by applying each of the numerous reference voltages one at a time. After each reference voltage is applied, this logic stores the result, such as a 0 or a 1, in a page buffer. This page buffer conventionally stores results from multiple cells at once, which are then transferred to an external buffer associated with a flash controller. This is repeated until all the reference voltages have been applied.
For two-bits/cell MLC flash-memory, for example, conventional flash memory logic applies three reference voltages to read out all two bits. For three-bits/cell MLC flash-memory, this logic applies seven reference voltages to read out all three bits stored in the cell. For each application of a reference voltage, the set of results is stored in the page buffer and then transferred to the external buffer. After all three or seven sets of results have been transferred, the flash controller determines the data value of each cell based upon the three or seven sets of transmitted results in the external buffer.
The transfer of these sets of results to the external buffer, however, can make reading flash memory slow. In many cases, this transfer is the performance bottleneck for reading flash memory. For example, transmitting data from the page buffer to the external buffer is slow because the transfer is sequentially performed with only a few bits of data in each transmission.